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LM2734
SNVS288J – SEPTEMBER 2004 – REVISED DECEMBER 2014
LM2734 Thin SOT 1-A Load Step-Down DC-DC Regulator
1 Features
3 Description
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The LM2734 regulator is a monolithic, highfrequency, PWM step-down DC-DC converter in a 6pin Thin SOT package. The device provides all the
active functions to provide local DC-DC conversion
with fast transient response and accurate regulation
in the smallest possible PCB area.
1
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•
•
•
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•
•
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Thin SOT-6 Package
3.0-V to 20-V Input Voltage Range
0.8-V to 18-V Output Voltage Range
1-A Output Current
550-kHz (LM2734Y) and 1.6-MHz (LM2734X)
Switching Frequencies
300-mΩ NMOS Switch
30-nA Shutdown Current
0.8-V, 2% Internal Voltage Reference
Internal Soft-Start
Current-Mode, PWM Operation
WEBENCH® Online Design Tool
Thermal Shutdown
LM2734XQ and LM2734YQ are AEC-Q100 Grade
1 Qualified and are Manufactured on an
Automotive Grade Flow.
2 Applications
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Local Point-of-Load Regulation
Core Power in HDDs
Set-Top Boxes
Battery-Powered Devices
USB Powered Devices
DSL Modems
Notebook Computers
Automotive
With a minimum of external components and online
design support through WEBENCH, the LM2734
regulator is easy to use. The ability to drive 1-A loads
with an internal 300-mΩ NMOS switch using state-ofthe-art 0.5-µm BiCMOS technology results in the best
power density available. The world-class control
circuitry allows for on-times as low as 13 ns, thus
supporting exceptionally high-frequency conversion
over the entire 3-V to 20-V input operating range
down to the minimum output voltage of 0.8 V.
Switching frequency is internally set to 550 kHz
(LM2734Y) or 1.6 MHz (LM2734X), allowing the use
of extremely small surface-mount inductors and chip
capacitors. Even though the operating frequencies
are very high, efficiencies up to 90% are easy to
achieve. External shutdown is included, featuring an
ultra-low standby current of 30 nA.
The LM2734 regulator uses current-mode control and
internal compensation to provide high-performance
regulation over a wide range of operating conditions.
Additional features include internal soft-start circuitry
to reduce inrush current, pulse-by-pulse current limit,
thermal shutdown, and output overvoltage protection.
Device Information(1)
PART NUMBER
LM2734
PACKAGE
SOT (6)
BODY SIZE (NOM)
2.90 mm x 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application Circuit
Efficiency vs Load Current
VIN = 5 V, VOUT = 3.3 V
D2
VIN
BOOST
VIN
C3
C1
L1
SW
VOUT
LM2734
ON
D1
EN
C2
R1
OFF
FB
GND
R2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2734
SNVS288J – SEPTEMBER 2004 – REVISED DECEMBER 2014
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Performance Characteristics ........................
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................... 9
7.4 Device Functional Modes........................................ 10
8
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Applications ................................................ 14
9 Power Supply Recommendations...................... 28
10 Layout................................................................... 28
10.1 Layout Guidelines ................................................. 28
10.2 Layout Example .................................................... 29
11 Device and Documentation Support ................. 30
11.1
11.2
11.3
11.4
Third-Party Products Disclaimer ...........................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
30
30
30
30
12 Mechanical, Packaging, and Orderable
Information ........................................................... 30
4 Revision History
Changes from Revision I (April 2013) to Revision J
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
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5 Pin Configuration and Functions
See Package Number DDC (R-PDSO-G6)
6-Lead SOT
Top View
BOOST
1
6
SW
GND
2
5
VIN
FB
3
4
EN
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
BOOST
1
I
GND
2
GND
FB
3
I
Feedback pin. Connect FB to the external resistor divider to set output voltage.
EN
4
I
Enable control input. Logic high enables operation. Do not allow this pin to float or be greater
than VIN + 0.3 V.
VIN
5
I
Input supply voltage. Connect a bypass capacitor to this pin.
SW
6
O
Output switch. Connects to the inductor, catch diode, and bootstrap capacitor.
Boost voltage that drives the internal NMOS control switch. A bootstrap capacitor is
connected between the BOOST and SW pins.
Signal and Power ground pin. Place the bottom resistor of the feedback network as close as
possible to this pin for accurate regulation.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature (unless otherwise noted) (1) (2)
MIN
MAX
UNIT
VIN
-0.5
24
V
SW Voltage
-0.5
24
V
Boost Voltage
-0.5
30
V
Boost to SW Voltage
-0.5
6.0
V
FB Voltage
-0.5
0.3
V
EN Voltage
-0.5
VIN + 0.3
V
150
°C
260
°C
150
°C
Junction Temperature
Soldering Information Reflow Peak Pkg. Temp.(15s)
Tstg Storage temperature
(1)
(2)
-65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
6.2 ESD Ratings
Human Body Model (HBM), per ANSI/ESDA/JEDEC JS001 (1)
VESD Electrostatic discharge
(1)
VALUE
UNIT
±2000
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VIN
NOM
MAX
UNIT
3
20
V
SW Voltage
-0.5
20
V
Boost Voltage
-0.5
25
V
Boost to SW Voltage
1.6
5.5
V
Junction Temperature Range
−40
125
°C
6.4 Thermal Information
LM2734
THERMAL METRIC (1)
DDC
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
158.1
RθJC(top)
Junction-to-case (top) thermal resistance
46.5
RθJB
Junction-to-board thermal resistance
29.5
ψJT
Junction-to-top characterization parameter
0.8
ψJB
Junction-to-board characterization parameter
29.2
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
VIN = 5V, VBOOST - VSW = 5V unless otherwise specified. Datasheet min/max specification limits are ensured by design, test, or
statistical analysis.
PARAMETER
TEST CONDITIONS
TJ = 25°C
MIN (1)
TYP (2)
MIN
VFB
Feedback Voltage
ΔVFB/Δ
VIN
Feedback Voltage Line
Regulation
VIN = 3V to 20V
IFB
Feedback Input Bias
Current
Sink/Source
Undervoltage Lockout
VIN Rising
2.74
Undervoltage Lockout
VIN Falling
2.3
2.0
UVLO
0.800
TJ = -40°C to 125°C
MAX (1)
0.784
TYP
MAX
0.816
0.01
250
V
0.44
0.30
1.6
1.2
1.9
LM2734Y
0.55
0.40
0.66
LM2734X
92
85%
LM2734Y
96
90%
LM2734X
2%
LM2734Y
1%
RDS(ON) Switch ON Resistance
VBOOST - VSW = 3V
300
ICL
Switch Current Limit
VBOOST - VSW = 3V
1.7
IQ
Quiescent Current
Switching
1.5
Quiescent Current
(shutdown)
VEN = 0V
30
LM2734X (50% Duty
Cycle)
2.5
3.5
LM2734Y (50% Duty
Cycle)
1.0
1.8
Switching Frequency
DMAX
Maximum Duty Cycle
DMIN
IBOOST
Minimum Duty Cycle
Boost Pin Current
Shutdown Threshold
Voltage
VEN Falling
Enable Threshold
Voltage
VEN Rising
IEN
Enable Pin Current
Sink/Source
ISW
Switch Leakage
VEN_TH
(1)
(2)
nA
2.90
LM2734X
FSW
V
%/V
10
UVLO Hysteresis
UNIT
0.62
600
1.2
MHz
mΩ
2.5
A
2.5
mA
nA
mA
0.4
1.8
V
10
nA
40
nA
Specified to Average Outgoing Quality Level (AOQL).
Typicals represent the most likely parametric norm.
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6.6 Typical Performance Characteristics
All curves taken at VIN = 5 V, VBOOST - VSW = 5 V and TA = 25°C, unless specified otherwise.
6
Figure 1. Oscillator Frequency vs Temperature - L1 = 4.7 µH
Figure 2. Oscillator Frequency vs Temperature - L1 = 10 μH
Figure 3. Current Limit vs Temperature
Figure 4. Current Limit vs Temperature
VIN = 20 V
Figure 5. VFB vs Temperature
Figure 6. RDSON vs Temperature
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Typical Performance Characteristics (continued)
All curves taken at VIN = 5 V, VBOOST - VSW = 5 V and TA = 25°C, unless specified otherwise.
Figure 7. IQ Switching vs Temperature
Figure 8. Line Regulation - L1 = 4.7 µH
VOUT = 1.5 V, IOUT = 500 mA
Figure 9. Line Regulation - L1 = 10 μH
VOUT = 1.5 V, IOUT = 500 mA
Figure 10. Line Regulation - L1 = 4.7 µH
VOUT = 3.3 V, IOUT = 500 mA
Figure 11. Line Regulation - L1 = 10 μH
VOUT = 3.3 V, IOUT = 500 mA
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7 Detailed Description
7.1 Overview
The LM2734 device is a constant frequency PWM buck regulator IC that delivers a 1-A load current. The
regulator has a preset switching frequency of either 550 kHz (LM2734Y) or 1.6 MHz (LM2734X). These high
frequencies allow the LM2734 device to operate with small surface-mount capacitors and inductors, resulting in
DC-DC converters that require a minimum amount of board space. The LM2734 device is internally
compensated, so it is simple to use, and requires few external components. The LM2734 device uses currentmode control to regulate the output voltage.
The following operating description of the LM2734 device will refer to the Simplified Block Diagram () and to the
waveforms in Figure 12. The LM2734 device supplies a regulated output voltage by switching the internal NMOS
control switch at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the
reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic turns on the
internal NMOS control switch. During this on-time, the SW pin voltage (VSW) swings up to approximately VIN, and
the inductor current (IL) increases with a linear slope. IL is measured by the current-sense amplifier, which
generates an output proportional to the switch current. The sense signal is summed with the regulator’s
corrective ramp and compared to the error amplifier’s output, which is proportional to the difference between the
feedback voltage and VREF. When the PWM comparator output goes high, the output switch turns off until the
next switching cycle begins. During the switch off-time, inductor current discharges through Schottky diode D1,
which forces the SW pin to swing below ground by the forward voltage (VD) of the catch diode. The regulator
loop adjusts the duty cycle (D) to maintain a constant output voltage.
VSW
D = TON/TSW
VIN
SW
Voltage
TOFF
TON
0
t
VD
IL
TSW
IPK
Inductor
Current
t
0
Figure 12. LM2734 Waveforms of SW Pin Voltage and Inductor Current
8
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7.2 Functional Block Diagram
VIN
VIN
Current-Sense Amplifier
EN
OFF
Internal
Regulator
and
Enable
Circuit
+
-
BOOST
VBOOST
Under
Voltage
Lockout
Oscillator
CIN
D2
Thermal
Shutdown
Current
Limit
Output
Control
Logic
Reset
Pulse
+
ISENSE
+
+
Corrective Ramp
0.3:
Switch
Driver
SW
OVP
Comparator
-
ON
RSENSE
Error
Signal
D
1
+
PWM
Comparator
CBOOST
VSW L
IL
VOUT
COUT
0.88V
+
-
R
1
FB
Internal
Compensation
+
Error Amplifier
+
-
VREF
0.8V
R
2
GND
7.3 Feature Description
7.3.1 Output Overvoltage Protection
The overvoltage comparator compares the FB pin voltage to a voltage that is 10% higher than the internal
reference Vref. Once the FB pin voltage goes 10% above the internal reference, the internal NMOS control
switch is turned off, which allows the output voltage to decrease toward regulation.
7.3.2 Undervoltage Lockout
Undervoltage lockout (UVLO) prevents the LM2734 from operating until the input voltage exceeds 2.74 V
(typical).
The UVLO threshold has approximately 440 mV of hysteresis, so the part will operate until VIN drops below 2.3 V
(typical). Hysteresis prevents the part from turning off during power up if VIN is nonmonotonic.
7.3.3 Current Limit
The LM2734 device uses cycle-by-cycle current limiting to protect the output switch. During each switching cycle,
a current limit comparator detects if the output switch current exceeds 1.7 A (typical), and turns off the switch
until the next switching cycle begins.
7.3.4 Thermal Shutdown
Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature
exceeds 165°C. After thermal shutdown occurs, the output switch does not turn on until the junction temperature
drops to approximately 150°C.
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7.4 Device Functional Modes
7.4.1 Enable Pin / Shutdown Mode
The LM2734 device has a shutdown mode that is controlled by the enable pin (EN). When a logic low voltage is
applied to EN, the part is in shutdown mode and its quiescent current drops to typically 30 nA. Switch leakage
adds another 40 nA from the input supply. The voltage at this pin should never exceed VIN + 0.3 V.
7.4.2 Soft-Start
This function forces VOUT to increase at a controlled rate during start up. During soft-start, the error amplifier’s
reference voltage ramps from 0 V to its nominal value of 0.8 V in approximately 200 µs. This forces the regulator
output to ramp up in a more linear and controlled fashion, which helps reduce inrush current. Under some
circumstances at start-up, an output voltage overshoot may still be observed. This may be due to a large output
load applied during start up. Large amounts of output external capacitance can also increase output voltage
overshoot. A simple solution is to add a feed forward capacitor with a value between 470 pf and 1000 pf across
the top feedback resistor (R1). See Figure 23 for further detail.
10
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Boost Function
Capacitor CBOOST and diode D2 in Figure 13 are used to generate a voltage VBOOST. VBOOST - VSW is the gate
drive voltage to the internal NMOS control switch. To properly drive the internal NMOS switch during its on-time,
VBOOST needs to be at least 1.6 V greater than VSW. Although the LM2734 device will operate with this minimum
voltage, it may not have sufficient gate drive to supply large values of output current. Therefore, it is
recommended that VBOOST be greater than 2.5 V above VSW for best efficiency. VBOOST – VSW should not exceed
the maximum operating limit of 5.5 V.
5.5 V > VBOOST – VSW > 2.5 V for best performance.
VBOOST
D2
BOOST
VIN
VIN
LM2734
CIN
CBOOST
L
SW
VOUT
GND
D1
COUT
Figure 13. VOUT Charges CBOOST
When the LM2734 device starts up, internal circuitry from the BOOST pin supplies a maximum of 20 mA to
CBOOST. This current charges CBOOST to a voltage sufficient to turn the switch on. The BOOST pin will continue to
source current to CBOOST until the voltage at the feedback pin is greater than 0.76 V.
There are various methods to derive VBOOST:
1. From the input voltage (VIN)
2. From the output voltage (VOUT)
3. From an external distributed voltage rail (VEXT)
4. From a shunt or series Zener diode
In the simplified block diagram of Functional Block Diagram, capacitor CBOOST and diode D2 supply the gatedrive current for the NMOS switch. Capacitor CBOOST is charged via diode D2 by VIN. During a normal switching
cycle, when the internal NMOS control switch is off (TOFF) (refer to Figure 12), VBOOST equals VIN minus the
forward voltage of D2 (VFD2), during which the current in the inductor (L) forward biases the Schottky diode D1
(VFD1). Therefore the voltage stored across CBOOST is:
VBOOST - VSW = VIN - VFD2 + VFD1
(1)
When the NMOS switch turns on (TON), the switch pin rises to:
VSW = VIN – (RDSON × IL),
(2)
forcing VBOOST to rise thus reverse biasing D2. The voltage at VBOOST is then:
VBOOST = 2VIN – (RDSON × IL) – VFD2 + VFD1
(3)
which is approximately:
2VIN - 0.4 V
(4)
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Application Information (continued)
for many applications. Thus the gate-drive voltage of the NMOS switch is approximately:
VIN - 0.2 V
(5)
An alternate method for charging CBOOST is to connect D2 to the output as shown in Figure 13. The output
voltage should be from 2.5 V and 5.5 V, so that proper gate voltage will be applied to the internal switch. In this
circuit, CBOOST provides a gate drive voltage that is slightly less than VOUT.
In applications where both VIN and VOUT are greater than 5.5 V, or less than 3 V, CBOOST cannot be charged
directly from these voltages. If VIN to VOUT are greater than 5.5 V, CBOOST can be charged from VIN or VOUT minus
a Zener voltage by placing a Zener diode D3 in series with D2, as shown in Figure 14. When using a series
Zener diode from the input, ensure that the regulation of the input supply does not create a voltage that falls
outside the recommended VBOOST voltage.
(VINMAX – VD3) < 5.5 V
(VINMIN – VD3) > 1.6 V
(6)
(7)
D2
D3
VIN
VIN
CIN
BOOST
VBOOST
CBOOST
LM2734
L
VOUT
SW
GND
D1
C OUT
Figure 14. Zener Reduces Boost Voltage from VIN
An alternative method is to place the Zener diode D3 in a shunt configuration as shown in Figure 15. A small 350
mW to 500 mW 5.1-V Zener diode in a SOT or SOD package can be used for this purpose. A small ceramic
capacitor such as a 6.3 V, 0.1-µF capacitor (C4) should be placed in parallel with the Zener diode. When the
internal NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The
0.1-µF parallel shunt capacitor ensures that the VBOOST voltage is maintained during this time.
Resistor R3 should be chosen to provide enough RMS current to the Zener diode (D3) and to the BOOST pin. A
recommended choice for the Zener current (IZENER) is 1 mA. The current IBOOST into the BOOST pin supplies the
gate current of the NMOS control switch and varies typically according to the following formula for the X version:
IBOOST = 0.56 × (D + 0.54) × (VZENER – VD2) mA
(8)
IBOOST can be calculated for the Y version using the following:
IBOOST = 0.22 × (D + 0.54) × (VZENER - VD2) µA
(9)
where D is the duty cycle, VZENER and VD2 are in volts, and IBOOST is in milliamps. VZENER is the voltage applied to
the anode of the boost diode (D2), and VD2 is the average forward voltage across D2. Note that this formula for
IBOOST gives typical current. For the worst case IBOOST, increase the current by 40%. In that case, the worst case
boost current will be:
IBOOST-MAX = 1.4 × IBOOST
(10)
R3 will then be given by:
R3 = (VIN - VZENER) / (1.4 × IBOOST + IZENER)
(11)
For example, using the X-version let VIN = 10 V, VZENER = 5 V, VD2 = 0.7 V, IZENER = 1 mA, and duty cycle D =
50%. Then:
IBOOST = 0.56 × (0.5 + 0.54) × (5 - 0.7) mA = 2.5 mA
R3 = (10 V - 5 V) / (1.4 × 2.5 mA + 1 mA) = 1.11 kΩ
12
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(12)
(13)
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Application Information (continued)
VZ
C4
D2
D3
R3
VIN
VIN
C IN
BOOST
VBOOST
CBOOST
LM2734
L
SW
VOUT
GND
D1
COUT
Figure 15. Boost Voltage Supplied from the Shunt Zener on VIN
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8.2 Typical Applications
8.2.1 LM2734X (1.6 MHz) VBOOST Derived from VIN 5V to 1.5 V/1 A
D2
VIN
BOOST
VIN
C3
C1
L1
R3
VOUT
SW
LM2734
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 16. LM2734X (1.6 MHz) VBOOST Derived from VIN 5 V to 1.5-V/1-A Schematic
8.2.1.1 Design Requirements
Derive charge for VBOOST from the input supply (VIN ). VBOOST – VSW should not exceed the maximum operating
limit of 5.5V.
8.2.1.2 Detailed Design Procedure
Table 1. Bill of Materials for Figure 16
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734X
C1, Input Cap
10 µF, 6.3V, X5R
TDK
C3216X5ROJ106M
C2, Output Cap
10 µF, 6.3V, X5R
TDK
C3216X5ROJ106M
C3, Boost Cap
0.01 uF, 16V, X7R
TDK
C1005X7R1C103K
D1, Catch Diode
0.3 VF Schottky 1 A, 10 VR
ON Semi
MBRM110L
D2, Boost Diode
1VF @ 50-mA Diode
Diodes, Inc.
1N4148W
L1
4.7µH, 1.7A,
TDK
VLCF4020T- 4R7N1R2
R1
8.87 kΩ, 1%
Vishay
CRCW06038871F
R2
10.2 kΩ, 1%
Vishay
CRCW06031022F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
8.2.1.2.1 Inductor Selection
The Duty Cycle (D) can be approximated quickly using the ratio of output voltage (VO) to input voltage (VIN):
VO
D=
VIN
(14)
The catch diode (D1) forward voltage drop and the voltage drop across the internal NMOS must be included to
calculate a more accurate duty cycle. Calculate D by using the following formula:
VO + VD
D=
VIN + VD - VSW
(15)
VSW can be approximated by:
VSW = IO x RDS(ON)
14
(16)
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The diode forward drop (VD) can range from 0.3 V to 0.7 V depending on the quality of the diode. The lower VD
is, the higher the operating efficiency of the converter.
The inductor value determines the output ripple current. Lower inductor values decrease the size of the inductor,
but increase the output ripple current. An increase in the inductor value will decrease the output ripple current.
The ratio of ripple current (ΔiL) to output current (IO) is optimized when it is set between 0.3 and 0.4 at 1 A. The
ratio r is defined as:
r=
'iL
lO
(17)
One must also ensure that the minimum current limit (1.2 A) is not exceeded, so the peak current in the inductor
must be calculated. The peak current (ILPK) in the inductor is calculated as shown in Equation 18:
ILPK = IO + ΔIL/2
(18)
If r = 0.5 at an output of 1 A, the peak current in the inductor will be 1.25 A. The minimum specified current limit
over all operating conditions is 1.2 A. One can either reduce r to 0.4 resulting in a 1.2-A peak current, or make
the engineering judgement that 50 mA over will be safe enough with a 1.7-A typical current limit and 6 sigma
limits. When the designed maximum output current is reduced, the ratio r can be increased. At a current of 0.1 A,
r can be made as high as 0.9. The ripple ratio can be increased at lighter loads because the net ripple is actually
quite low, and if r remains constant the inductor value can be made quite large. An equation empirically
developed for the maximum ripple ratio at any current less than 2 A is:
r = 0.387 x IOUT-0.3667
(19)
Note that this is just a guideline.
The LM2734 device operates at frequencies allowing the use of ceramic output capacitors without compromising
transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple.
See Output Capacitor for more details on calculating output voltage ripple.
Now that the ripple current or ripple ratio is determined, the inductance is calculated as shown in Equation 20:
L=
VO + VD
IO x r x fS
x (1-D)
where
•
•
fs is the switching frequency
IO is the output current.
(20)
When selecting an inductor, make sure that it is capable of supporting the peak output current without saturating.
Inductor saturation will result in a sudden reduction in inductance and prevent the regulator from operating
correctly. Because of the speed of the internal current limit, it necessary to specify the peak current of the
inductor only for the required maximum output current. For example, if the designed maximum output current is
0.5 A and the peak current is 0.7 A, then the inductor should be specified with a saturation current limit of >0.7 A.
There is no need to specify the saturation or peak current of the inductor at the 1.7-A typical switch current limit.
The difference in inductor size is a factor of 5. Because of the operating frequency of the LM2734, ferrite based
inductors are preferred to minimize core losses. This presents little restriction because the variety of ferrite based
inductors is huge. Lastly, inductors with lower series resistance (DCR) will provide better operating efficiency. For
recommended inductors see example circuits.
8.2.1.2.2 Input Capacitor
An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The
primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent
Series Inductance). The recommended input capacitance is 10 µF, although 4.7 µF is sufficient for input voltages
below 6 V. The input voltage rating is specifically stated by the capacitor manufacturer. Make sure to check any
recommended deratings and also verify if there is any significant change in capacitance at the operating input
voltage and the operating temperature. The input capacitor maximum RMS input current rating (IRMS-IN) must be
greater than:
IRMS-IN = IO x
r2
D x 1-D +
12
(21)
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From Equation 21 from the above equation that maximum RMS capacitor current occurs when D = 0.5. Always
calculate the RMS at the point where the duty cycle, D, is closest to 0.5. The ESL of an input capacitor is usually
determined by the effective cross sectional area of the current path. A large leaded capacitor will have high ESL
and a 0805 ceramic chip capacitor will have very low ESL. At the operating frequencies of the LM2734 device,
certain capacitors may have an ESL so large that the resulting impedance (2πfL) will be higher than that required
to provide stable operation. As a result, surface-mount capacitors are strongly recommended. Sanyo POSCAP,
Tantalum or Niobium, Panasonic SP or Cornell Dubilier ESR, and multilayer ceramic capacitors (MLCC) are all
good choices for both input and output capacitors and have very low ESL. For MLCCs it is recommended to use
X7R or X5R dielectrics. Consult the capacitor manufacturer data sheet to see how rated capacitance varies over
operating conditions.
8.2.1.2.3 Output Capacitor
The output capacitor is selected based upon the desired output ripple and transient response. The initial current
of a load transient is provided mainly by the output capacitor. The output ripple of the converter is:
'VO = 'iL x (RESR +
1
)
8 x fS x CO
(22)
When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the
output ripple will be approximately sinusoidal and 90° phase shifted from the switching action. Given the
availability and quality of MLCCs and the expected output voltage of designs using the LM2734 device, there is
really no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to
bypass high frequency noise. A certain amount of switching edge noise will couple through parasitic
capacitances in the inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not.
Because the output capacitor is one of the two external components that control the stability of the regulator
control loop, most applications will require a minimum at 10 µF of output capacitance. Capacitance can be
increased significantly with little detriment to the regulator stability. Like the input capacitor, recommended
multilayer ceramic capacitors are X7R or X5R. Again, verify actual capacitance at the desired operating voltage
and temperature.
Check the RMS current rating of the capacitor. The RMS current rating of the capacitor chosen must also meet
the following condition:
IRMS-OUT = IO x
r
12
(23)
8.2.1.2.4 Catch Diode
The catch diode (D1) conducts during the switch off-time. A Schottky diode is recommended for its fast switching
times and low forward voltage drop. The catch diode should be chosen so that its current rating is greater than:
ID1 = IO x (1-D)
(24)
The reverse breakdown rating of the diode must be at least the maximum input voltage plus appropriate margin.
To improve efficiency choose a Schottky diode with a low forward voltage drop.
8.2.1.2.5 Boost Diode
A standard diode such as the 1N4148 type is recommended. For VBOOST circuits derived from voltages less than
3.3 V, a small-signal Schottky diode is recommended for greater efficiency. A good choice is the BAT54 small
signal diode.
8.2.1.2.6 Boost Capacitor
A ceramic 0.01-µF capacitor with a voltage rating of at least 16 V is sufficient. The X7R and X5R MLCCs provide
the best performance.
16
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8.2.1.2.7 Output Voltage
The output voltage is set using the following equation where R2 is connected between the FB pin and GND, and
R1 is connected between VO and the FB pin. A good value for R2 is 10 kΩ.
R1 =
VO
VREF
- 1 x R2
(25)
8.2.1.3 Application Curves
Figure 17. Efficiency vs Load Current - L1 = 4.7 µH VOUT =
5V
Figure 18. Efficiency vs Load Current - L1 = 10 μH VOUT = 5
V
Figure 19. Efficiency vs Load Current - L1 = 4.7 µH VOUT =
3.3 V
Figure 20. Efficiency vs Load Current - L1 = 10 μH VOUT =
3.3 V
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Figure 21. Efficiency vs Load Current - L1 = 4.7 µH VOUT =
1.5 V
18
Figure 22. Efficiency vs Load Current - L1 = 10 μH VOUT =
1.5 V
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8.2.2 LM2734X (1.6 MHz) VBOOST Derived from VOUT 12 V to 3.3 V /1 A
D2
VIN 12V
BOOST
VIN
C3
C1
R3
L1
VOUT
3.3V
SW
LM2734
D1
C2
ON
EN
R1
CFF
OFF
FB
GND
R2
Figure 23. LM2734X (1.6 MHz) VBOOST Derived from VOUT 12 V to 3.3 V /1-A Schematic
8.2.2.1 Design Requirements
Derive charge for VBOOST from the output voltage, (VOUT). The output voltage should be between 2.5 V and 5.5 V.
8.2.2.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 2. Bill of Materials for Figure 23
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734X
C1, Input Cap
10 µF, 25 V, X7R
TDK
C3225X7R1E106M
C2, Output Cap
22 µF, 6.3 V, X5R
TDK
C3216X5ROJ226M
C3, Boost Cap
0.01 µF, 16 V, X7R
TDK
C1005X7R1C103K
CFF
1000 pF 25 V
TDK
C0603X5R1E102K
D1, Catch Diode
0.34 VF Schottky 1 A, 30 VR
Vishay
SS1P3L
D2, Boost Diode
1 VF @ 50-mA Diode
Diodes, Inc.
1N4148W
L1
4.7µH, 1.7 A
TDK
VLCF4020T- 4R7N1R2
R1
31.6 kΩ, 1%
Vishay
CRCW06033162F
R2
10 kΩ, 1%
Vishay
CRCW06031002F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
8.2.2.3 Application Curves
See Application Curves.
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8.2.3 LM2734X (1.6 MHz) VBOOST Derived from VSHUNT 18 V to 1.5 V /1 A
C4
D3
R4
D2
BOOST
VIN
VIN
C3
C1
R3
L1
VOUT
SW
LM2734
ON
D1
C2
EN
OFF
R1
FB
GND
R2
Figure 24. LM2734X (1.6 MHz) VBOOST Derived from VSHUNT 18 V to 1.5 V /1-A Schematic
8.2.3.1 Design Requirements
An alternative method when VIN is greater than 5.5 V is to place the zener diode D3 in a shunt configuration. A
small 350 mW to 500 mW 5.1 V zener in a SOT or SOD package can be used for this purpose. A small ceramic
capacitor such as a 6.3 V, 0.1 μF capacitor (C4) should be placed in parallel with the zener diode. When the
internal NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The
0.1 μF parallel shunt capacitor ensures that the VBOOST voltage is maintained during this time.
8.2.3.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 3. Bill of Materials for Figure 24
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734X
C1, Input Cap
10 µF, 25 V, X7R
TDK
C3225X7R1E106M
C2, Output Cap
22 µF, 6.3 V, X5R
TDK
C3216X5ROJ226M
C3, Boost Cap
0.01 µF, 16 V, X7R
TDK
C1005X7R1C103K
C4, Shunt Cap
0.1 µF, 6.3 V, X5R
TDK
C1005X5R0J104K
D1, Catch Diode
0.4 VF Schottky 1 A, 30 VR
Vishay
SS1P3L
D2, Boost Diode
1 VF @ 50-mA Diode
Diodes, Inc.
1N4148W
D3, Zener Diode
5.1 V 250 Mw SOT
Vishay
BZX84C5V1
L1
6.8 µH, 1.6 A,
TDK
SLF7032T-6R8M1R6
R1
8.87 kΩ, 1%
Vishay
CRCW06038871F
R2
10.2 kΩ, 1%
Vishay
CRCW06031022F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
R4
4.12 kΩ, 1%
Vishay
CRCW06034121F
8.2.3.3 Application Curves
See Application Curves.
20
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8.2.4 LM2734X (1.6 MHz) VBOOST Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 1 A
D3
D2
BOOST
VIN
VIN
C1
C3
R3
L1
VOUT
SW
LM2734
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 25. LM2734X (1.6 MHz) VBOOST Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 1-A Schematic
8.2.4.1 Design Requirements
In applications where both VIN and VOUT are greater than 5.5 V, or less than 3 V, CBOOST cannot be charged
directly from these voltages. If VIN is greater than 5.5 V, CBOOST can be charged from VIN minus a zener voltage
by placing a zener diode D3 in series with D2. When using a series zener diode from the input, ensure that the
regulation of the input supply doesn’t create a voltage that falls outside the recommended VBOOST voltage.
(VINMAX – VD3) < 5.5 V
(VINMIN – VD3) > 1.6 V
(26)
(27)
8.2.4.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 4. Bill of Materials for Figure 25
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734X
C1, Input Cap
10 µF, 25V, X7R
TDK
C3225X7R1E106M
C2, Output Cap
22 µF, 6.3 V, X5R
TDK
C3216X5ROJ226M
C3, Boost Cap
0.01 µF, 16 V, X7R
TDK
C1005X7R1C103K
D1, Catch Diode
0.4 VF Schottky 1 A, 30 VR
Vishay
SS1P3L
D2, Boost Diode
1 VF @ 50-mA Diode
Diodes, Inc.
1N4148W
D3, Zener Diode
11 V 350 Mw SOT
Diodes, Inc.
BZX84C11T
L1
6.8 µH, 1.6 A,
TDK
SLF7032T-6R8M1R6
R1
8.87 kΩ, 1%
Vishay
CRCW06038871F
R2
10.2 kΩ, 1%
Vishay
CRCW06031022F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
8.2.4.3 Application Curves
See Application Curves.
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8.2.5 LM2734X (1.6 MHz) VBOOST Derived from Series Zener Diode (VOUT) 15 V to 9 V /1 A
D3
D2
VIN
BOOST
VIN
C3
C1
R3
L1
VOUT
SW
LM2734
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 26. LM2734X (1.6 MHz) VBOOST Derived from Series Zener Diode (VOUT) 15 V to 9 V /1-A Schematic
8.2.5.1 Design Requirements
In applications where both VIN and VOUT are greater than 5.5 V, or less than 3 V, CBOOST cannot be charged
directly from these voltages. If VIN and VOUT are greater than 5.5 V, CBOOST can be charged from VOUT minus a
zener voltage by placing a zener diode D3 in series with D2.
8.2.5.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 5. Bill of Materials for Figure 26
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734X
C1, Input Cap
10 µF, 25 V, X7R
TDK
C3225X7R1E106M
C2, Output Cap
22 µF, 16 V, X5R
TDK
C3216X5R1C226M
C3, Boost Cap
0.01 µF, 16 V, X7R
TDK
C1005X7R1C103K
D1, Catch Diode
0.4 VF Schottky 1 A, 30 VR
Vishay
SS1P3L
D2, Boost Diode
1 VF @ 50-mA Diode
Diodes, Inc.
1N4148W
D3, Zener Diode
4.3 V 350-mw SOT
Diodes, Inc.
BZX84C4V3
L1
6.8 µH, 1.6 A,
TDK
SLF7032T-6R8M1R6
R1
102 kΩ, 1%
Vishay
CRCW06031023F
R2
10.2 kΩ, 1%
Vishay
CRCW06031022F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
8.2.5.3 Application Curves
See Application Curves.
22
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8.2.6 LM2734Y (550 kHz) VBOOST Derived from VIN 5 V to 1.5 V / 1 A
D2
VIN
BOOST
VIN
C3
C1
L1
R3
VOUT
SW
LM2734
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 27. LM2734Y (550 kHz) VBOOST Derived from VIN 5 V to 1.5 V / 1-A Schematic
8.2.6.1 Design Requirements
Derive charge for VBOOST from the input supply (VIN ). VBOOST – VSW should not exceed the maximum operating
limit of 5.5 V.
8.2.6.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 6. Bill of Materials for Figure 27
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734Y
C1, Input Cap
10 µF, 6.3 V, X5R
TDK
C3216X5ROJ106M
C2, Output Cap
22 µF, 6.3 V, X5R
TDK
C3216X5ROJ226M
C3, Boost Cap
0.01 µF, 16 V, X7R
TDK
C1005X7R1C103K
D1, Catch Diode
0.3 VF Schottky 1 A, 10 VR
ON Semi
MBRM110L
D2, Boost Diode
1 VF @ 50-mA Diode
Diodes, Inc.
1N4148W
L1
10 µH, 1.6 A,
TDK
SLF7032T-100M1R4
R1
8.87 kΩ, 1%
Vishay
CRCW06038871F
R2
10.2 kΩ, 1%
Vishay
CRCW06031022F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
8.2.6.3 Application Curves
See Application Curves.
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8.2.7 LM2734Y (550 kHz) VBOOST Derived from VOUT 12 V to 3.3 V / 1 A
D2
VIN 12V
BOOST
VIN
C3
C1
R3
L1
VOUT
3.3V
SW
LM2734
D1
C2
ON
EN
R1
CFF
OFF
FB
GND
R2
Figure 28. LM2734Y (550 kHz) VBOOST Derived from VOUT 12 V to 3.3 V / 1 A Schematic
8.2.7.1 Design Requirements
Derive charge for VBOOST from the output voltage, (VOUT ). The output voltage should be between 2.5 V and 5.5
V.
8.2.7.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 7. Bill of Materials for Figure 28
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734Y
C1, Input Cap
10 µF, 25 V, X7R
TDK
C3225X7R1E106M
C2, Output Cap
22 µF, 6.3 V, X5R
TDK
C3216X5ROJ226M
C3, Boost Cap
0.01 µF, 16 V, X7R
TDK
C1005X7R1C103K
D1, Catch Diode
0.34 VF Schottky 1 A, 30VR
Vishay
SS1P3L
D2, Boost Diode
0.6 VF @ 30-mA Diode
Vishay
BAT17
L1
10 µH, 1.6 A
TDK
SLF7032T-100M1R4
R1
31.6 kΩ, 1%
Vishay
CRCW06033162F
R2
10.0 kΩ, 1%
Vishay
CRCW06031002F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
8.2.7.3 Application Curves
See Application Curves.
24
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8.2.8 LM2734Y (550 kHz) VBOOST Derived from VSHUNT 18 V to 1.5 V / 1 A
C4
D3
R4
D2
BOOST
VIN
VIN
C3
C1
R3
L1
VOUT
SW
LM2734
ON
D1
C2
EN
OFF
R1
FB
GND
R2
Figure 29. LM2734Y (550 kHz) VBOOST Derived from VSHUNT 18 V to 1.5 V / 1-A
8.2.8.1 Design Requirements
An alternative method when VIN is greater than 5.5 V is to place the zener diode D3 in a shunt configuration. A
small 350 mW to 500 mW 5.1 V zener in a SOT or SOD package can be used for this purpose. A small ceramic
capacitor such as a 6.3 V, 0.1 μF capacitor (C4) should be placed in parallel with the zener diode. When the
internal NMOS switch turns on, a pulse of current is drawn to charge the internal NMOS gate capacitance. The
0.1 μF parallel shunt capacitor ensures that the VBOOST voltage is maintained during this time.
8.2.8.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 8. Bill of Materials for Figure 29
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734Y
C1, Input Cap
10 µF, 25 V, X7R
TDK
C3225X7R1E106M
C2, Output Cap
22 µF, 6.3 V, X5R
TDK
C3216X5ROJ226M
C3, Boost Cap
0.01 µF, 16 V, X7R
TDK
C1005X7R1C103K
C4, Shunt Cap
0.1 µF, 6.3 V, X5R
TDK
C1005X5R0J104K
D1, Catch Diode
0.4 VF Schottky 1 A, 30VR
Vishay
SS1P3L
D2, Boost Diode
1 VF @ 50-mA Diode
Diodes, Inc.
1N4148W
D3, Zener Diode
5.1 V 250 Mw SOT
Vishay
BZX84C5V1
L1
15 µH, 1.5 A
TDK
SLF7045T-150M1R5
R1
8.87 kΩ, 1%
Vishay
CRCW06038871F
R2
10.2 kΩ, 1%
Vishay
CRCW06031022F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
R4
4.12 kΩ, 1%
Vishay
CRCW06034121F
8.2.8.3 Application Curves
See Application Curves.
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8.2.9 LM2734Y (550 kHz) VBOOST Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 1 A
D3
D2
BOOST
VIN
VIN
C1
C3
R3
L1
VOUT
SW
LM2734
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 30. LM2734Y (550 kHz) VBOOST Derived from Series Zener Diode (VIN) 15 V to 1.5 V / 1-A Schematic
8.2.9.1 Design Requirements
In applications where both VIN and VOUT are greater than 5.5 V, or less than 3 V, CBOOST cannot be charged
directly from these voltages. If VIN is greater than 5.5 V, CBOOST can be charged from VIN minus a zener voltage
by placing a zener diode D3 in series with D2. When using a series zener diode from the input, ensure that the
regulation of the input supply doesn’t create a voltage that falls outside the recommended VBOOST voltage.
(VINMAX – VD3) < 5.5 V
(VINMIN – VD3) > 1.6 V
(28)
(29)
8.2.9.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 9. Bill of Materials for Figure 30
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734Y
C1, Input Cap
10 µF, 25 V, X7R
TDK
C3225X7R1E106M
C2, Output Cap
22 µF, 6.3 V, X5R
TDK
C3216X5ROJ226M
C3, Boost Cap
0.01 µF, 16 V, X7R
TDK
C1005X7R1C103K
D1, Catch Diode
0.4 VF Schottky 1 A, 30 VR
Vishay
SS1P3L
D2, Boost Diode
1 VF @ 50-mA Diode
Diodes, Inc.
1N4148W
D3, Zener Diode
11 V 350 Mw SOT
Diodes, Inc.
BZX84C11T
L1
15 µH, 1.5 A,
TDK
SLF7045T-150M1R5
R1
8.87 kΩ, 1%
Vishay
CRCW06038871F
R2
10.2 kΩ, 1%
Vishay
CRCW06031022F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
8.2.9.3 Application Curves
See Application Curves.
26
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8.2.10 LM2734Y (550 kHz) VBOOST Derived from Series Zener Diode (VOUT) 15 V to 9 V / 1 A
D3
D2
VIN
BOOST
VIN
C3
C1
R3
L1
VOUT
SW
LM2734
ON
D1
EN
C2
R1
OFF
FB
GND
R2
Figure 31. LM2734Y (550 kHz) VBOOST Derived from Series Zener Diode (VOUT) 15 V to 9 V / 1-A
8.2.10.1 Design Requirements
In applications where both VIN and VOUT are greater than 5.5 V, or less than 3 V, CBOOST cannot be charged
directly from these voltages. If VIN and VOUT are greater than 5.5 V, CBOOST can be charged from VOUT minus a
zener voltage by placing a zener diode D3 in series with D2.
8.2.10.2 Detailed Design Procedure
See Detailed Design Procedure.
Table 10. Bill of Materials for Figure 31
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
1-A Buck Regulator
Texas Instruments
LM2734Y
C1, Input Cap
10 µF, 25 V, X7R
TDK
C3225X7R1E106M
C2, Output Cap
22 µF, 16 V, X5R
TDK
C3216X5R1C226M
C3, Boost Cap
0.0 1 µF, 16 V, X7R
TDK
C1005X7R1C103K
D1, Catch Diode
0.4 VF Schottky 1 A, 30 VR
Vishay
SS1P3L
D2, Boost Diode
1 VF @ 50-mA Diode
Diodes, Inc.
1N4148W
D3, Zener Diode
4.3 V 350 Mw SOT
Diodes, Inc.
BZX84C4V3
L1
22 µH, 1.4 A,
TDK
SLF7045T-220M1R3-1PF
R1
102 kΩ, 1%
Vishay
CRCW06031023F
R2
10.2kΩ, 1%
Vishay
CRCW06031022F
R3
100kΩ, 1%
Vishay
CRCW06031003F
8.2.10.3 Application Curves
See Application Curves.
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9 Power Supply Recommendations
Input voltage is rated as 3 V to 18 V; however, care must be taken in certain circuit configurations (for example,
VBOOST derived from VIN where the requirement that VBOOST - VSW < 5.5 V should be observed) Also, for best
efficiency VBOOST should be at least 2.5-V above VSW.
The voltage on the Enable pin should not exceed VIN by more than 0.3 V.
10 Layout
10.1 Layout Guidelines
When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The
most important consideration when completing the layout is the close coupling of the GND connections of the CIN
capacitor and the catch diode D1. These ground ends should be close to one another and be connected to the
GND plane with at least two through-holes. Place these components as close to the IC as possible. Next in
importance is the location of the GND connection of the COUT capacitor, which should be near the GND
connections of CIN and D1.
There should be a continuous ground plane on the bottom layer of a two-layer board except under the switching
node island.
The FB pin is a high-impedance node and care should be taken to make the FB trace short to avoid noise pickup
and inaccurate regulation. The feedback resistors should be placed as close as possible to the IC, with the GND
of R2 placed as close as possible to the GND of the IC. The VOUT trace to R1 should be routed away from the
inductor and any other traces that are switching.
High AC currents flow through the VIN, SW and VOUT traces, so they should be as short and wide as possible.
However, making the traces wide increases radiated noise, so the designer must make this trade-off. Radiated
noise can be decreased by choosing a shielded inductor.
The remaining components should also be placed as close as possible to the IC. See Application Note AN-1229
(SNVA054) for further considerations and the LM2734 demo board as an example of a four-layer layout.
28
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10.2 Layout Example
Figure 32. Top Layer
D2
VIN
VIN
BOOST
C3
C1
R5
L1
VOUT
SW
D1
VEN
C2
R1
EN
FB
GND
R2
Figure 33. Layout Schematic
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11 Device and Documentation Support
11.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Trademarks
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
30
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PACKAGE OPTION ADDENDUM
www.ti.com
11-Dec-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM2734XMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SFDB
LM2734XMKX/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SFDB
LM2734XQMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SUKB
LM2734XQMKE/NOPB
ACTIVE
SOT
DDC
6
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SUKB
LM2734XQMKX/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SUKB
LM2734YMK
NRND
SOT
DDC
6
1000
TBD
Call TI
Call TI
-40 to 125
SFEB
LM2734YMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SFEB
LM2734YMKX/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SFEB
LM2734YQMK/NOPB
ACTIVE
SOT
DDC
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SVCB
LM2734YQMKE/NOPB
ACTIVE
SOT
DDC
6
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SVCB
LM2734YQMKX/NOPB
ACTIVE
SOT
DDC
6
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SVCB
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Dec-2014
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM2734, LM2734-Q1 :
• Catalog: LM2734
• Automotive: LM2734-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Dec-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM2734XMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734XMKX/NOPB
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734XQMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734XQMKE/NOPB
SOT
DDC
6
250
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734XQMKX/NOPB
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734YMK
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734YMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734YMKX/NOPB
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734YQMK/NOPB
SOT
DDC
6
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734YQMKE/NOPB
SOT
DDC
6
250
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2734YQMKX/NOPB
SOT
DDC
6
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Dec-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2734XMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2734XMKX/NOPB
SOT
DDC
6
3000
210.0
185.0
35.0
LM2734XQMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2734XQMKE/NOPB
SOT
DDC
6
250
210.0
185.0
35.0
LM2734XQMKX/NOPB
SOT
DDC
6
3000
210.0
185.0
35.0
LM2734YMK
SOT
DDC
6
1000
210.0
185.0
35.0
LM2734YMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2734YMKX/NOPB
SOT
DDC
6
3000
210.0
185.0
35.0
LM2734YQMK/NOPB
SOT
DDC
6
1000
210.0
185.0
35.0
LM2734YQMKE/NOPB
SOT
DDC
6
250
210.0
185.0
35.0
LM2734YQMKX/NOPB
SOT
DDC
6
3000
210.0
185.0
35.0
Pack Materials-Page 2
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